1. Field of the Invention
Embodiments of the present invention relate in general to the field of electronic circuits, in particular to computer software methods of detecting errors in electronic integrated circuit designs.
2. Description of the Related Art
Electrical engineers often need to verify that a circuit will function properly, before it is fabricated as an integrated circuit. The most common way of doing this is to use simulation software, such as SPICE. However, there are many situations where an electrical circuit may have potential faults that will not be detected or predicted by simulation. Hence, the engineer often wants to employ additional checking on the circuit, using topology as an alternative to time domain simulation.
One of the most common types of circuit checks is to verify that a particular device, such as a transistor, is adequately (not improperly) connected. Standard industry practice is to subject a circuit design to peer review, wherein one might discover, upon inspection of schematics, that a transistor may be connected to a source of voltage that is too high for the ratings of that particular given device. Other common circuit checks include: inspection of transistor gate terminals to make sure they're tied to valid signals, inspection of power supply nets to make sure they're not shorted to ground nets, inspection of signal outputs to make sure they're driving the appropriate inputs elsewhere, and so on.
Modern electronic circuits, such as integrated circuit chips can often be composed of hundreds of millions of electrical components. These can include a diversity of electronic devices (e.g. field effect transistors (FET) such as PFET and NFET devices, metal oxide semiconductor field effect transistors (MOSFET), bipolar junction transistors (BJTs), and other sub-circuits, often formed from various types of simpler transistor-based circuits. Such chips are highly complex to both design and debug. As a result, there has been a substantial amount of prior art interest in both computer software methods to design complex electronic circuits, and as computer software methods to simulate the function of these complex electronic circuits.
A “net” is a term for a circuit connection that ties multiple electrical device pins together (in math terms and graph traversal terms, this is called a “node”). A whole circuit consists of many such nets (e.g. net1, net2, net3 . . . netn). When a circuit is represented in the form of a computer storage file, it is usually called a “netlist”. It is usually easier to at least begin analyzing more complex electronic circuits at the netlist level, and thus the computer software used to analyze such electronic circuits is sometimes referred to as “netlist analyzers”.
One of the most common electronic devices in circuits is the field effect transistor, or “FET”. A FET can generally be thought of as providing a valve or regulatory function, where the amount of current passing through the device is controlled by its gate terminal, or “gate”. Because gates are the controlling points of the regulatory functions that FETs provide, they are of critical importance in the operation of a circuit. When a FET is used to drive a digital signal, it is often referred to as a digital driver.
As might be imagined, when highly complex integrated circuit chips are designed, their complexity soon outstrips the ability of both the human mind (and even sophisticated computer circuit design software) to understand and detect all design problems. One design problem that has been particularly difficult for prior art methods to detect and analyze is when, often due to an unintended design oversight, floating FET gates, essentially non-functional or improperly functioning portions of the circuit, are created. In a sense floating gates act somewhat like uninitialized variables in software, because their function is unpredictable (they control FETs in an unpredictable way). Floating gates can cause a complex circuit to either fail outright or act in an erratic and undesired manner.
An alternative type of problem occurs when instead of there being no gate or digital driver to a circuit, instead accidentally multiple drivers have been created. This type of situation, where the intended multiple drivers create multiple conflicting current paths at a particular net, is called “contention”. Although in some types of circuits, such as analog circuits, such contention may be intended and useful; in other types of circuits contention can be harmful. This is particularly true for digital circuits. Indeed in digital circuits, unintended contention can be viewed as a type of design error that, if not caught, can cause the integrated circuit device to act unpredictably, consume excess current, generate excess heat, and even burn out.
Thus automated methods of detecting various design errors, such as floating gates and contention are of considerable interest in the field.